This invention relates to logic cores and, more particularly, to methods and systems for providing logic cores.
System designers, e.g., circuit system designers, typically make use of a wide variety of software design tools to facilitate the design process. One particular type of design tool is a logic core generator. Logic core generators are essentially software tools that provide cataloging, customization, and delivery of so-called xe2x80x9ccoresxe2x80x9d. A xe2x80x9ccorexe2x80x9d can be thought of as a design entity that is provided by a logic core generator for the system designer to use in the design process. A xe2x80x9ccorexe2x80x9d typically includes a number of design files, a graphical user interface (GUI) that allows for customization of the core, simulation files, and symbol files for incorporation into third party CAE flows. Exemplary design entities include, without limitation, basic elements such as shift registers, decoders, and simple gates. Design entities can also include memories, processor products, processor peripherals, UARTs, and various DSP functions, to name just a few. Exemplary cores and design tools are available from Xilinx, Inc. of 2100 Logic Drive, San Jose, Calif. One commercially available logic core generator is the Xilinx CORE Generator(trademark), which is described in detail in a document entitled xe2x80x9cCORE Generator(trademark) System 2.1i User Guidexe2x80x9d that is available from Xilinx, or on-line at a web site having the URL: http://www.xilinx.com/products/logicore/coregen. This document is hereby incorporated herein by reference.
Typically, companies that offer core products and that design the products themselves provide software that enables customers to access and use the various cores. The customer typically provides a higher level design, and uses the various cores that are available to implement various functionalities that are needed in the design. There are many companies that provide cores for use in system design. Core generators, however, are not typically designed to natively enable the use of cores that are provided by different core providers. One reason is that core providers generally design their own cores in accordance with their own formats. If a particular format is not compatible with a core generator, then the core generator cannot natively use it to assist the system designer. Thus, when a system designer wishes to use such a core, he typically contacts the core provider, who then provides the core in whatever format is available. The burden is on the system designer to find a way to incorporate the third party core into his design.
This situation is diagrammatically shown in FIG. 1. In FIG. 1, a logic core provider 10 includes a core generator 12. In this example, logic core provider 10 provides various cores that assist system designers in designing their particular systems. Logic core generator 12 generates the cores that logic core provider 10 provides in well known ways. FIG. 1 also shows a number of different logic core providers 14, 16, and 18. Each of these logic core providers provides its own cores having its own respective format. For example, logic core provider 14 has cores that have a format x; logic core provider 16 has logic cores that have a format y; and logic core provider 18 has logic cores that have a format z. Each of these individual formats is incompatible with and cannot be used with the logic core generator 12 offered by logic core provider 10. Thus, when any of users 20, 22, and 24 desires to use a particular logic core that is offered by one of these other third party logic core providers, he must typically contact the individual logic core provider, e.g., via network 26, and have the logic core delivered in whatever format the particular logic core provider uses. Therefore, only logic cores in the same format can be combined.
Therefore, a given logic core provider may have a product containing many different cores that can be natively used by its core generator. The logic core provider may also maintain information about other cores that are provided by other third party core providers. When a system designer uses the core generator to build a system design, if he needs a core that is offered by a third party core provider, he typically cannot use the needed core in connection with the core generator he is currently using. This limitation is a problem because, as one might imagine, there may be a number of cores from different third party core providers that are desired to be incorporated into a design. Yet, without a way of standardizing the cores, combining the cores is extremely difficult, if not impossible.
Accordingly, the present invention arose out of concerns associated with providing methods and systems by which third party cores can be utilized by one or more core generators.
Methods and systems of bundling third party logic cores are described. In one embodiment, a computer-implemented method provides logic cores for use with a logic core generator. The method comprises receiving, with a computer, information from one or more logic core providers. The information pertains to one or more logic cores that are available from the logic core providers. The information is in a format that cannot be used by the logic core generator. The information is processed with the computer to provide the information in a format that can be used by the logic core generator to generate logic cores.
In another embodiment, a computer-implemented method of providing logic cores for use with a logic core generator comprises defining a graphical user interface (GUI) that is configured to interface with third party logic core providers. The GUI collects information pertaining to one or more logic cores that are provided by the third party logic core providers. The collected information is then rendered into a form that is useable by the logic core generator for generating one or more logic cores.
In yet another embodiment, a logic core bundling wizard is provided and is configured for use in connection with a computer system having one or more processors. The logic core bundling wizard comprises a graphical user interface (GUI) that is executable on the one or more processors and configured to collect information from one or more third party logic core providers, so that the information can be processed into a form that is useable by a particular logic core generator.
In still a further embodiment, a logic core system comprises a logic core generator, multiple logic cores from a single logic core provider, and at least one logic core from at least one different logic core provider. All of the logic cores are preferably useable by the logic core generator to provide one or more logic cores.
In another embodiment, a computerized system that is configured to provide logic cores comprises a user display, one or more processors, memory, and software code in the memory. The software code, when executed by the processors, causes the processors to present a graphical user interface (GUI) on the user display through which a third party logic core provider can enter information about one or more of the logic cores that they provide. The information is automatically processed by the processors into a form that is useable by a particular logic core generator.